Architecture

Stack

The Compiler Atlas lists twenty-one nodes in eight bands. Only gate nodes carry DECIDE, and only a DECIDE edge commits state. Stage is the node’s position on the layer evolution ladder: S0 named, S1 contracted, S2 anchored by an external result, S3 gated by a runnable, failable test, S4 measured against a frozen bar, S5 executing. ⚑ marks a node in which a contradiction was found and paid for.

The research map uses a second stack: layers L0–L10 and two vertical members, V1 neural proposal and V2 construction IR (intermediate representation). Both stacks use the ids L0–L9 with different meanings. Part 3 relates them; elsewhere on this page the map’s layers are called map layers.

Authority order

LEARN → PROJECT → VERIFY → DECIDE

The implemented order. It is stated in the operator contract Γ_D of the learned anisotropic Laplacian: “The network emits a raw tensor (LEARN); the admissibility projection makes the structural certificates true by construction (PROJECT); the verifier measures what the projection does not construct (VERIFY); only then is the operator admitted (DECIDE).” The network never decides whether its own operator is valid, and a projection never becomes a penalty. A run may skip a stage it does not have; it may not reverse two it has.

Status: directive D03, the contract Γ_D and the authority-order check, closed 2026-09-22 with 66 tests. Its ten certificate rows are not yet placed in the field compiler’s gate table; they are deferred until a stage producing a tensor field exists.

Documents → Learned Anisotropic Laplacian V2 — Admissible Operator · Build Record — Learned Anisotropic Laplacian V2

Earlier formulations, not reconciled with the implemented order

• PROPOSE · PARAMETERIZE · DECIDE: edge labels of the canonical DAG (architecture map, 2026-08-27). Authority is labelled on edges, never on nodes. Every DECIDE row is compiler-owned; no path reaches a commit without passing a DECIDE gate; no learned edge writes the stratum τ, the ledger, the event trigger or promotion.
• LEARN → PROPOSE → CONSTRAIN → CERTIFY → DECIDE: the learning plane of the Architecture Atlas (2026-09-20), kept separate from its run-time control plane, spectral gap → projector stability → structural authority → compute allocation.

At run time the default is to execute: the veto is armed only at the five hard stops, in STRICT mode and at the promotion boundary. The Architecture Atlas reads every gate, certificate and refusal on the build-time clock and at the promotion boundary.

Compile loop

X → 𝒜_θ → G_𝒜 → L_𝒜 → Spec(L_𝒜) → d_𝒜 → M → P_adm → Φ(P) → (r_geom, r_op) → 𝒜′_θ

One chain from observation to a grown operator algebra, with two returns: a nonzero operator residual r_op returns to 𝒜_θ as a missing primitive; the geometric residual r_geom returns to P_adm (fidelity). Every card in Part 2 except F2, a method, attaches to stages of this chain (Architecture Atlas §4 map).

View A of the Compiler Atlas runs the same loop over the nodes as a cascade: U1 → U2 → U3 → CG → U4 → U5 → A7 → L1 → L2 → L3 → L4 → L5 → L6 → L7 (commit) → L8 (event) → L2 (re-admission) → L7 (certificates re-established) → F2 → R (promotion decided at the external verification boundary, EVB) → F1 → U2.

Cascade → view A

A variant is an architecture drawn on the framework of Part 1. Four are drawn as views of the Compiler Atlas. Seventeen are catalogued as cards in the Architecture Atlas document and are not drawn as views. Each status is quoted from its source with the source’s date; none is promoted above the tier its source gives it.

Compiler Atlas views

• ACanonical DAG: the upstream interface tier U1–U5, the standing stack L0–L9 with R, the code spine and the feedback edges, drawn as one graph.
• GTyped geometric intermediate representation (TGIR): the same machine drawn for a compiler audience; nodes map to the canonical layers and share their dossiers.
• SStrata: history; developmental rounds G0 and R001–R010, newest on top, with the nodes each round created or revised.
• LLineage: history; each node on its program thread, with its birth coordinate τ and recorded revisions.
• FField compiler: the stack instantiated as a build (round R009); each stage occupies a stack slot and reuses the stack’s semantics.
• OOperator response: prototype plan of 2026-09-22, eight layers on one closed mesh, each slotted to a stack node.

All twenty-one nodes by band → view T (TIERS)

On each view card, “Map layers” is computed from the crosswalk of Part 3: the map layers reached by the view’s nodes, direct if any node reaches the layer directly. It is derived, as the crosswalk is, and awaits the same owner review.

Architecture Atlas cards

Each card quotes the Architecture Atlas: its one line, the spine stages it attaches to as primary (§4), its tier and, where the tier includes one, its measured result. None is drawn as a Compiler Atlas view. Statuses are as of 2026-09-20; a later change is noted, with its date and source, where a later record states it.

The Compiler Atlas stack and the research map stack were written separately, and they share the ids L0–L9 with different meanings. Atlas L0 is the type and proof layer; map L0 is observation. Atlas L7 is the guard; map L7 is constitutive geometry. Atlas L9 is the higher spectral response; map L9 is Abel–Jacobi global admission. The table matches each Atlas node to map layers by comparing the two definitions. No source document states this crosswalk: every row is derived and awaits owner review.

Map layers with no Atlas node: L10, geometric and mesh realization; the Atlas ends at commit and does not draw realization. Map L9 is reached only through the Abel–Jacobi gate code attached to Atlas L7. Map L4 is reached only in part, through Atlas L3.

The word evolution differs between the stacks: map band C, Evolution, is change of structure (transport coefficients, constitutive geometry, variational steps); Atlas tier 4, Evolution, holds L9 and R, operator memory, and the Atlas’s slow-clock evolution section also draws the feedback edges F1, metric evolution, and F2, which sit on the feedback band.

Data → portal/data/architecture.json · overlay on the map → map.html?atlas=A